Sp20 - Introduction to Digital Systems

In this lab you will familiarize yourself with digital numbers, digital systems, and applications of digital systems by experimenting with the digital FPGA development board that you will use throughout the semester.

Because this term is on-line, some things you may see in the lab description this semester will not apply. We have tried to strike out all such things but there may be some things left. If in doubt, please ask.

Learning Outcomes

  • Become familiar with the lab FPGA board.
  • Learn about simple logic equations, binary numbers, and applications of digital systems.

Preliminary

  • You will need an active CAEDM account to log onto the computers in room 423 EB or any CAEDM (college computing) facilities. So learn how to get one by clicking this link.
  • You will need a notebook to be used as your lab book to record what you do for each lab. There will be times when you will need to take a photo of pages in your lab notebook and turn it in electronically to complete the lab.
  • Carefully read through the instructions for completing lab assignments.

Exercises

Exercise #1 - Introduction to the BYU Digital lab

Getting Help During Lab Session

When in Zoom, if you need to ask a question you can virtually raise your hand, the instructor will be notified, and you can then ask your question. If there is not lecture or discussion going on, you may also need to speak up to get the instructor's attention (as he may be grading previous assignments and may miss the raised hand in Zoom).

Managing Files and Disk Space

If you are doing Option #3 to work with the Vivado software, this section especially applies to you. Nevertheless, an understanding of the CAEDM J drive is important to all students, even if you will not use it much this term because you will use it in future terms.

The computers in the digital lab are managed by CAEDM, the College of Engineering and Technology computer support team. All users of these computers must conform to the CAEDM user policy including the food and drink policy. Review this policy to understand the appropriate uses of the facilities in this room.

You will generate a large number of files as you complete the lab exercises and it will be important to properly manage your files throughout the semester. You will have a number of files that you will want to save throughout the semester (primarily your source files) and many temporary files that you can ignore (the files generated during the synthesis of your digital circuits).

With a CAEDM account (which you are able to keep as long as you are a student) you are also given disk space to store your class files. This disk space will show up as the “J drive” on essentiall all department lab computers or CAEDM computers. Read the Using CAEDM Storage (J Drive) tutorial to learn more about this disk space.

It is a good idea to make an ECEn220 folder in your J Drive, make a labs folder inside of that. You should also create a sub-directory for each lab in the course. You will be generating a lot of files for these labs and need to keep them separate.

Indicate your CAEDM user ID.

Exercise 1 Pass-off: No pass-off for exercise 1. Answer the above questions on Learning Suite.



Exercise #2 - Introduction to the NEXYS 4 DDR Development Board

During the course of the semester you will build various digital systems using digital logic. You will complete these using the NEXYS 4 DDR development board. You will be using this board throughout the semester so it is important to familiarize yourself with the board and learn how to use it. In this exercise, you will use the NEXYS 4 development board to explore a variety of digital system functions.

A picture of this board is shown below and a corresponding board can be found at your lab station.

 NEXYS 4 DDR

In the center of this board is an Integrated Circuit (IC) device called a Field Programmable Gate Array or FPGA (this is the square device labeled ARTIX-7). This FPGA device is the heart of the board and contains the programmable digital logic that you will use in most of your lab exercises. An FPGA device is a programmable digital circuit that can be configured to perform many different functions based on the user's digital design. You will be creating digital circuit designs during the semester and placing these circuits onto the FPGA device. The circuit that is configured onto the FPGA is defined in a file called a bitstream. These files are created by software from the manufacturer of the FPGA. You will be creating your own circuit bitstreams throughout the semester, but not in this first lab. The following video provides an overview of this NEXYS4 DDR board:

Overview of the NEXYS4 DDR Board

After watching the video, check to make sure the blue jumpers are set as shown in the NEXYS4 jumpers tutorial. If they aren't, correct them.

What is the proper jumper setting of Jumper JP2? (You'll have to look closely at the board to find which one is JP2.)

Now, turn the NEXYS 4 board on using the switch in the top left corner of the board. When you first turn the board on, the FPGA device will be programmed with a configuration file for a digital circuit that is saved on the board's memory. This digital circuit implements a number of functions on the seven segment display, tri-color LEDs, switches, buttons, and VGA display. Once the FPGA has been configured (as indicated by the DONE LED), the circuit is operational. Answer the following questions about the functionality of this digital circuit:

What do you see on the seven-segment displays?

What happens when you flip the switches on the bottom of the board?

What is happening to the two tri-color LEDs in the center of the board by the FPGA?

Exercise 2 Pass-Off: there is nothing to pass off, just answer the questions above.

Exercise #3 - Digital Logic and Binary Numbers

In this next exercise, you will configure the FPGA with a different circuit. To use and experiment with this new circuit, you need to load this configuration, or bit, file onto the FPGA. You will be loading bit files on the the FPGA for every lab each week. You will be creating your own bit files in future lab assignments from the circuits you design.

In this case, download the above bitfile onto your computer using whatever mechanism your browser supports.

Then, if you are using Option #1 or Options #2, follow this tutorial (top part) to program the FPGA with the new bit file using Xilinx tools.

But, if you are using Option #3 you will run Adept and select the bitfile to program onto your board. Ask a TA if you need help with Adept.

The FPGA should now be acting differently in its behavior than when you first powered it on.

Seven Segment Display

The NEXYS4 board has an 8 digit seven-segment display. You will create a circuit to control this display in a future lab.

Press different buttons on the board to see what happens to this display.When none of the buttons are pressed, the display on the right-most digit is determined by the settings of the first four switches (SW3-SW0). Determine the value of the digit for all 16 combinations of switches SW3-SW0. .

SW3 SW2 SW1 SW0 Digit
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1

Tri-Color LEDs

The NEXYS4 board also has two tri-color LEDs (labelled LD17 and LD 16 on the board). Each of these LEDs actually contains three LEDs one each for the colors red, green, and blue. Different colors can be made from different combinations of the colors. The color of both LEDs is determined by the values of SW6-SW4 (SW6 = Red, SW5 = Green, and SW4 = Blue). Determine the colors for all eight combinations of switches SW6-SW4 in the table below.

SW6 SW5 SW4 LED Color
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

Single-Color LEDs

Above each of the 16 switches is a small green LED (labeled LD0 to LD15). The first five LEDs from right to left (LD0 to LD4) are each outputs to boolean logic equation based on switches 7-9. Add your completed table below to your lab report.

SW9 SW8 SW7 LD4 LD3 LD2 LD1 LD0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

Exercise 3 Pass-off: Nothing to pass off - just answer the questions above.

Exercise #4 - Audio

The NEXYS4 board also includes an omnidirectional MEMS microphone. This is located near the left middle of the board and is labeled MIC. This microphone uses an Analog Device ADMP421 chip to capture audio and digitize it into PDM (pulse density modulated) format. This chip is constantly digitizing the audio and sending the digital data to the FPGA device. The circuit is configured to record the audio data and store it in the 128 Mega bit DDR memory. It will then play this stored audio file back on the audio out jack. Perform this experiment by following these steps:

  1. Attach your headphones to the Audio Out Jack of the NEXYS 4 board
  2. Press the up button, labeled BTNU on the board. Once you press this button, the circuit will save or record all audio. The recording is indicated by the LEDs turning on from left to right. Talk into the microphone during this recording time.
  3. After five seconds of recording, the circuit will then play back the audio. This playback is indicated by the LEDs turning on from right to left.

Based on what you heard, what can you say about the microphone and speaker setup: is it high or low quality, is it stereo or mono?

Final Pass-Off

Make a video describing your answers to above experiments. Be sure to show: a) what happens when you flip the switches on the bottom of the board, b) show how the new bitfile you programmed the board with works, c) show an example of the audio recording/playback.

Final Questions.

Answer the following questions:

Describe your final machine setup so we can make sure the most knowledgeable TA corrects your work. Is it Windows or a Mac? Are you doing Option #1, #2, or #3?

How many hours did you work on the lab?

Provide any suggestions for improving this lab in the future.


TA Notes and Feedback