<?xml version="1.0" encoding="utf-8"?>
<!-- generator="FeedCreator 1.7.2-ppt DokuWiki" -->
<?xml-stylesheet href="https://ecen220wiki.groups.et.byu.net/sp20/dokuwiki/lib/exe/css.php?s=feed" type="text/css"?>
<rdf:RDF
    xmlns="http://purl.org/rss/1.0/"
    xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
    xmlns:slash="http://purl.org/rss/1.0/modules/slash/"
    xmlns:dc="http://purl.org/dc/elements/1.1/">
    <channel rdf:about="https://ecen220wiki.groups.et.byu.net/sp20/dokuwiki/feed.php">
        <title>BYU ECEn 220 tutorials:lab_5</title>
        <description></description>
        <link>https://ecen220wiki.groups.et.byu.net/sp20/dokuwiki/</link>
        <image rdf:resource="https://ecen220wiki.groups.et.byu.net/sp20/dokuwiki/lib/tpl/codowik/images/favicon.ico" />
       <dc:date>2026-05-18T10:46:43-06:00</dc:date>
        <items>
            <rdf:Seq>
                <rdf:li rdf:resource="https://ecen220wiki.groups.et.byu.net/sp20/dokuwiki/doku.php?id=tutorials:lab_5:dataflow_verilog&amp;rev=1487110590&amp;do=diff"/>
                <rdf:li rdf:resource="https://ecen220wiki.groups.et.byu.net/sp20/dokuwiki/doku.php?id=tutorials:lab_5:initializing_regs&amp;rev=1494365806&amp;do=diff"/>
                <rdf:li rdf:resource="https://ecen220wiki.groups.et.byu.net/sp20/dokuwiki/doku.php?id=tutorials:lab_5:inputs_as_outputs&amp;rev=1488312396&amp;do=diff"/>
            </rdf:Seq>
        </items>
    </channel>
    <image rdf:about="https://ecen220wiki.groups.et.byu.net/sp20/dokuwiki/lib/tpl/codowik/images/favicon.ico">
        <title>BYU ECEn 220</title>
        <link>https://ecen220wiki.groups.et.byu.net/sp20/dokuwiki/</link>
        <url>https://ecen220wiki.groups.et.byu.net/sp20/dokuwiki/lib/tpl/codowik/images/favicon.ico</url>
    </image>
    <item rdf:about="https://ecen220wiki.groups.et.byu.net/sp20/dokuwiki/doku.php?id=tutorials:lab_5:dataflow_verilog&amp;rev=1487110590&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2017-02-14T15:16:30-06:00</dc:date>
        <title>Dataflow Verilog</title>
        <link>https://ecen220wiki.groups.et.byu.net/sp20/dokuwiki/doku.php?id=tutorials:lab_5:dataflow_verilog&amp;rev=1487110590&amp;do=diff</link>
        <description>Dataflow Verilog

This is a quick introduction to Dataflow Verilog.  Dataflow Verilog is a more flexible and powerful style of Verilog coding.  Dataflow Verilog will also appear more similar to other programming languages with operators that you've seen before.  See the book for more information.</description>
    </item>
    <item rdf:about="https://ecen220wiki.groups.et.byu.net/sp20/dokuwiki/doku.php?id=tutorials:lab_5:initializing_regs&amp;rev=1494365806&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2017-05-09T15:36:46-06:00</dc:date>
        <title>Initialization</title>
        <link>https://ecen220wiki.groups.et.byu.net/sp20/dokuwiki/doku.php?id=tutorials:lab_5:initializing_regs&amp;rev=1494365806&amp;do=diff</link>
        <description>Initialization

This is a further explanation of behavioral verilog, if you have not reviewed the behavioral verilog tutorial yet it is recommended that you do so.

Registers are made with the key word  and hold any values they are given until given a new value.  However, they do not automatically start with a value.  In other words there is no automatic initialization.  There are a couple of ways to give them an initial value.  The first way is to reset or clear upon startup which should have t…</description>
    </item>
    <item rdf:about="https://ecen220wiki.groups.et.byu.net/sp20/dokuwiki/doku.php?id=tutorials:lab_5:inputs_as_outputs&amp;rev=1488312396&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2017-02-28T13:06:36-06:00</dc:date>
        <title>Using Inputs as Outputs</title>
        <link>https://ecen220wiki.groups.et.byu.net/sp20/dokuwiki/doku.php?id=tutorials:lab_5:inputs_as_outputs&amp;rev=1488312396&amp;do=diff</link>
        <description>Using Inputs as Outputs

Sometimes when you get to the Downloading to the Board section in labs you will be asked to hook up an input to an output, such as hooking up a switch to an input port and then hooking up that same port to an LED. You cannot do this</description>
    </item>
</rdf:RDF>
