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        <title>BYU ECEn 220</title>
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        <dc:date>2020-06-08T09:03:04-06:00</dc:date>
        <title>The CharDrawer-serial Module</title>
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        <description>The CharDrawer-serial Module

This module is used to write characters to your computer screen.  The module accepts only upper case characters (A-Z), digits (0-9) and space (“ ”).  A null character (0) will not be drawn, and all other ASCII values are drawn as a solid rectangle.</description>
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        <dc:date>2019-11-01T16:41:46-06:00</dc:date>
        <title>The CharDrawer Module</title>
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        <description>The CharDrawer Module

This module is used to draw strings of characters to the display, one pixel at a time.  The module accepts only upper case characters (A-Z), digits (0-9) and space (“ ”).  A null character (0) will not be drawn, and all other</description>
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        <dc:date>2020-06-08T10:55:26-06:00</dc:date>
        <title>The CharDrawer_serial Module</title>
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        <description>The CharDrawer_serial Module

This module is used to draw strings of characters to the serial output port, one character at a time.  The module accepts only upper case characters (A-Z), digits (0-9) and space (“ ”).  A null character (0) will not be drawn, and all other</description>
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        <dc:date>2020-02-07T16:22:13-06:00</dc:date>
        <title>Combinational Logic Styles</title>
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        <description>Combinational Logic Styles

There are many different styles of SystemVerilog code that you can use to generate combinational circuits.

Consider the following logic function that outputs a 1 when an odd number of the three input bits are 1.  (This is a 3-input XOR).</description>
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        <dc:date>2018-01-08T13:35:47-06:00</dc:date>
        <title>Common  Warnings and Errors</title>
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        <description>Common  Warnings and Errors

This page provides a summary of common warnings and errors that you may encounter while completing the labs. If you do not see a warning here then let a TA know so we can add your error to the lsit.

Simulation
 Warning  Description</description>
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        <dc:date>2018-01-25T14:18:40-06:00</dc:date>
        <title>Common TCL Commands</title>
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        <description>Common TCL Commands

This page provides a brief summary of common TCL commands that may help you during your laboratory assignments.
 Project Management  Command  Description  create_project  Create new Vivado Project 
Project Management

 Creating a new project</description>
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        <dc:date>2019-11-01T16:39:46-06:00</dc:date>
        <title>RC4 Decryption Module</title>
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        <description>RC4 Decryption Module

This module provides RC4 encryption/decryption.  Like other encryption algorithms, RC4 takes a human-readable message, called the plaintext, as well as a secret key, and produces an encrypted message of the same length, called the</description>
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        <dc:date>2019-10-23T09:14:33-06:00</dc:date>
        <title>Seven Segment Controller</title>
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        <description>Seven Segment Controller

In the seven segment decoder laboratory assignment, you created a circuit that can display a hexadecimal value on a single digit. 

On this page, you are provided with a Seven-Segment Controller module that can display a unique value on each digit of the eight-digit display. Displaying multiple digits on the display is accomplished by multiplexing the cathode signals and “driving” or displaying one digit at a time.  
To make it appear to the human eye that more than one…</description>
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        <dc:date>2018-08-13T09:28:53-06:00</dc:date>
        <title>ECEN 220 Textbook</title>
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        <description>ECEN 220 Textbook

List of textbook errors:

	*  The description for Figure 19.1 is incorrect.</description>
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        <dc:date>2019-01-07T12:35:56-06:00</dc:date>
        <title>Vivado Tool Access</title>
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        <description>Vivado Tool Access

This page summarizes the different ways you can access the Vivado tools. There are a variety of methods for accessing these tools outside of the Digital lab.
External Link

Digital Lab (423 EB)

The primary method for accessing the Vivado design tools is by using the computers in the digital laboratory (room 423 EB). The computers in this laboratory all have the Vivado tools installed and configured to operate properly. If you have any trouble running the Vivado tools in this…</description>
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        <dc:date>2019-05-13T13:12:46-06:00</dc:date>
        <title>The BitmapToVga Module</title>
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        <description>The BitmapToVga Module

Resources

[ BitmapToVga.sv]

[ clk_generator.v]

VGA Video

You have been given a module, BitmapToVga, that internally stores a Bitmap image, and continually sends the image out over the VGA port on the board as 640×480 video.

Internally, the bitmap image is</description>
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