====== Tutorial Feedback ======

The purpose of this page is to provide feedback and ideas on the tutorials used in the class. The goal is to refine these tutorials and gather feedback from the students and TAs so we can improve the tutorials each semester. Feel free to add any comments and suggestions below on these tutorials.
===== Instructions for Completing ECEN 220 Laboratory Assignments =====

Simeon: I felt it was very verbose. I condensed it and rearranged the page to be, in my opinion, easier to follow.

Jonathan: In the 2nd paragraph under "Lab Content", the word "completing" should be "completed", I believe. Also, in the first paragraph under "Pass Off", "assignmened" should be "assignment", I believe. 

[[tutorials:laboratory_instructions|Link to tutorial]]

===== Creating a CAEDM Account  =====

[[tutorials:making_a_caedm_account|Link to tutorial]]

===== Using CAEDM Storage (J Drive)  =====

<del>**Simeon**: I added a recommendation to use a USB drive instead of the J Drive as a primary project source because the J Drive is super slow. Students should use the J Drive for backup purposes though.</del> Recommending J Drive now because of infrastructure improvements, it's now good enough. - Simeon

[[tutorials:using_the_j_drive|Link to tutorial]]

===== Printing to a CAEDM Printer  =====

[[tutorials:printing_to_a_caedm_printer|Link to tutorial]]

===== Using the CAEDM Scanner  =====

Jonathan: I think this tutorial should include a picture of the opened scanner, showing the place where you put the paper to be scanned. The first time I went to use it, I had never used a scanner before and had no idea where to put my paper. 

[[tutorials:using_the_caedm_scanner|Link to tutorial]]

===== Setting Jumpers on the NEXYS 4 Board  =====

[[tutorials:setting_up_the_nexys4_jumpers|Link to tutorial]]

I think we should provide a link to the NEXYS reference document and provide more text describing what these jumpers do.

===== Downloading a bitfile to the Nexys 4 Board Using Adept  =====

[[tutorials:downloading_to_the_nexys_4_using_adept|Link to tutorial]]

Downloading a bitfile to the Nexys 4 Board Using Adept

===== Digital Lab Overview  =====

[[tutorials:digital_lab_overview|Link to tutorial]]

This is kind of long and dry - I should try to shorten it a bit.


===== NEXYS 4 FPGA Board Overview (video) =====

[[tutorials:nexys4|Link to tutorial]]

Should we have this embedded in a text page rather than as a video by itself?

Extend the video to quickly point out all of the other ICs on the board and what they do (DRAM, Flash, Accelerometer, Ethernet Phy, temperature sensor, USB host controller

===== 7400 Series Logic Devices  =====

[[tutorials:7400_series_logic|Link to tutorial]]

===== Building Logic Circuits on a Breadboard  =====

[[tutorials:using_the_breadboard|Link to tutorial]]

===== Verilog Coding Standards  =====

[[archive:tutorials:verilog_coding_standards|Link to tutorial]]

  Other ideas to put in this specification:
  * Plenty of comments in the code
  * White space
  * Describe what each port does
  * A comment for each always block

===== Creating a new Vivado Project  =====

[[tutorials:vivado_project_setup|Link to tutorial]]

I would like to have text TCL commands for many of the tutorials demonstrating how the steps discussed in the tutorial can be completed in both a GUI and using TCL commands.

Simeon: Video is off center starting at 1:59.

===== Add File Tutorial =====

[[tutorials:creating_a_new_module|Link to tutorial]]

In this tutorial, I think it would be helpful to demonstrate what happens if you add a file with a syntax error. Discuss how you find the error and how you resolve the error. We may want to add this to the video and the text.

===== Viewing Verilog Files as a Schematic =====

[[tutorials:viewing_design_elaboration|Link to tutorial]]

===== Vivado Simulator Tutorial =====

[[tutorials:starting_vivado_simulation_tool|Link to tutorial]]

I think this tutorial needs to be expanded a bit. The idea of simulation and verification is essential for the class and we want to provide all kinds of tools to help them out. Lets talk about ways of providing more resources for helping students iwth simulation tools.

The purpose of this exercise is to go through a thorough tutorial on simulation and learn how to use the simulation tool. 
  * How to start the simulator
  * How to look at waveforms
  * A variety of TCL commands to exercise the simulation
  * Writing TCL files to perform a simulation
  * Performing a successful simulation

<del>**Justen:** In the 'Using TCL Files in Simulations' tutorial there is a typo: in the line starting with **J:\\
** it says "a backslash / character".</del> fixed - Simeon
===== XDC Files  =====

[[tutorials:making_an_xdc_file|Link to tutorial]]

===== Adding XDC Files  =====

[[tutorials:adding_an_xdc_file|Link to tutorial]]

===== Running the Synthesis Tool  =====

[[tutorials:synthesis|Link to tutorial]]

===== Running the Implementation Tool  =====

[[tutorials:implementation|Link to tutorial]]

===== Running the Bitgen Tool  =====

[[tutorials:bitgen|Link to tutorial]]

===== Managing Hierarchy in Vivado  =====

[[tutorials:hierarchy_vivado_tutorial|Link to tutorial]]

===== Adding Testbenches  =====

[[tutorials:testbench_tutorial|Link to tutorial]]

Make sure to set the testbench file as top in the simulation sources



===== Other Potential Tutorials =====

==== Design Flow Tutorial ====

I think there should be a tutorial somewhere that gives an overview of all of the design steps needed in the creation of a bit file. There are a lot of steps and a good understanding of the purpose of each step will help the students in their debugging. This could possibly be added to the "create vivado project" tutorial.

  * Summarize all of the steps (flow diagram)
  * What the input to each step is and what the output is

We should have a tutorial for each of the design steps (which we already mostly have) and include each of the following in the tutorial:

  * Review the input and output of the step and summarize what the step is doing
  * Discuss the kinds of errors that you can have at this step and talk about ways of resolving the errors.
  *