User Tools
Differences
This shows you the differences between two versions of the page.
| Both sides previous revision Previous revision | |||
|
resources:combinational_logic_styles [2020/02/07 16:21] nelson |
resources:combinational_logic_styles [2020/02/07 16:22] (current) nelson |
||
|---|---|---|---|
| Line 56: | Line 56: | ||
| === Dataflow SV === | === Dataflow SV === | ||
| - | Using assign statement, and the ternary operator: | + | Using assign statement, and the ternary operator (also known as the ?: operator): |
| <code SystemVerilog> | <code SystemVerilog> | ||
| assign out = | assign out = | ||
