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resources:char_drawer [2019/07/11 15:55] jgoeders |
resources:char_drawer [2019/11/01 16:41] (current) jgoeders |
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| ======The CharDrawer Module====== | ======The CharDrawer Module====== | ||
| + | This module is used to draw strings of characters to the display, one pixel at a time. The module accepts only upper case characters (A-Z), digits (0-9) and space (" "). A null character (0) will not be drawn, and all other ASCII values are drawn as a solid rectangle. | ||
| - | <file SystemVerilog CharDrawer.sv> | + | There are several different ways to construct strings in SystemVerilog. For example, the following are all equivalent: |
| + | |||
| + | <code SystemVerilog> | ||
| + | logic [39:0] char_string; | ||
| + | assign char_string = "HELLO"; | ||
| + | </code> | ||
| + | |||
| + | |||
| + | <code SystemVerilog> | ||
| + | logic [39:0] char_string; | ||
| + | assign char_string = 40'h48454C4C4F; | ||
| + | </code> | ||
| + | |||
| + | <code SystemVerilog> | ||
| + | logic [39:0] char_string; | ||
| + | assign char_string = {"H", "E", "L", "L", "O"}; | ||
| + | </code> | ||
| + | |||
| + | <code SystemVerilog> | ||
| + | logic [39:0] char_string; | ||
| + | assign char_string = {8'h48, 8'h45, 8'h4C, 8'h4C, 8'h4F}; | ||
| + | </code> | ||
| + | |||
| + | ^ Module Name = CharDrawer ^^^^ | ||
| + | ^ Parameter ^ Default Value ^ Description ^^ | ||
| + | | MAX_CHARS | 16 |The length of the string that the module can display. || | ||
| + | ^ Port Name ^ Direction ^ Width ^ Description ^ | ||
| + | | clk | Input | 1 | 100 MHz Clock | | ||
| + | | reset | Input | 1 | Active-high reset | | ||
| + | | enable| Input | 1 | Raise this signal to start drawing. The drawing will continue until finished. To draw a new string you must lower and then raise this signal. | | ||
| + | | done | Output | 1 | Active-high, indicating that the string is done drawing | | ||
| + | | x_in | Input | 9 | Top-left x-coordinate of drawing region | | ||
| + | | y_in | Input | 8 | Top-left y-coordinate of drawing region | | ||
| + | | string_in | Input | MAX_CHARS * 8 | ASCII character string to draw, most-significant byte is drawn first. | | ||
| + | | x_out | Output| 9 | x-Coordinate of pixel to draw | | ||
| + | | y_out| Output | 8 | y-Coordinate of pixel to draw | | ||
| + | |||
| + | Click the link below to download the CharDrawer.sv file. | ||
| + | |||
| + | <file Verilog CharDrawer.sv> | ||
| module CharDrawer # ( | module CharDrawer # ( | ||
| parameter MAX_CHARS = 16 | parameter MAX_CHARS = 16 | ||
| Line 8: | Line 48: | ||
| input wire logic clk, // Clock | input wire logic clk, // Clock | ||
| input wire logic reset, // Active-high reset | input wire logic reset, // Active-high reset | ||
| - | input wire logic start, // Start drawing | + | input wire logic enable, // Start drawing |
| output logic done, // Done drawing | output logic done, // Done drawing | ||
| input wire logic [8:0] x_in, // Top-left (x,y) | input wire logic [8:0] x_in, // Top-left (x,y) | ||
| Line 51: | Line 91: | ||
| // State Machine | // State Machine | ||
| - | typedef enum {S_INIT, S_NEXT_CHAR, S_READ_ROW, S_SAVE_ROW, S_DRAW_ROW} StateType; | + | typedef enum {S_INIT, S_NEXT_CHAR, S_READ_ROW, S_SAVE_ROW, S_DRAW_ROW, S_DONE} StateType; |
| StateType cs; | StateType cs; | ||
| Line 73: | Line 113: | ||
| case (cs) | case (cs) | ||
| S_INIT: | S_INIT: | ||
| - | if (start) | + | if (enable) |
| cs <= S_NEXT_CHAR; | cs <= S_NEXT_CHAR; | ||
| S_NEXT_CHAR: | S_NEXT_CHAR: | ||
| Line 79: | Line 119: | ||
| cs <= S_READ_ROW; | cs <= S_READ_ROW; | ||
| else if (char_idx == 0) | else if (char_idx == 0) | ||
| - | cs <= S_INIT; | + | cs <= S_DONE; |
| S_READ_ROW: | S_READ_ROW: | ||
| cs <= S_SAVE_ROW; | cs <= S_SAVE_ROW; | ||
| Line 88: | Line 128: | ||
| if (row_done) begin | if (row_done) begin | ||
| if (char_idx == 0) begin | if (char_idx == 0) begin | ||
| - | cs <= S_INIT; | + | cs <= S_DONE; |
| end else begin | end else begin | ||
| cs <= S_NEXT_CHAR; | cs <= S_NEXT_CHAR; | ||
| Line 97: | Line 137: | ||
| end | end | ||
| end | end | ||
| + | S_DONE: | ||
| + | if (!enable) | ||
| + | cs <= S_INIT; | ||
| endcase | endcase | ||
| end | end | ||
