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| Both sides previous revision Previous revision Next revision | Previous revision | ||
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labs:uart_tx [2019/11/11 17:46] jgoeders [Final Pass Off] |
labs:uart_tx [2020/04/30 09:46] (current) nelson old revision restored (2020/03/02 17:32) |
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| # Reset design | # Reset design | ||
| add_force Reset 1 | add_force Reset 1 | ||
| + | add_force Send 0 | ||
| run 10ns | run 10ns | ||
| add_force Reset 0 | add_force Reset 0 | ||
| Line 153: | Line 154: | ||
| logic reset; | logic reset; | ||
| assign reset = ~CPU_RESETN; | assign reset = ~CPU_RESETN; | ||
| + | assign tx_debug = tx_out; | ||
| logic btnc_r; | logic btnc_r; | ||
| Line 286: | Line 288: | ||
| * Hook up the tx debug signal to the oscilliscope and view the transfer of an 8-bit character. | * Hook up the tx debug signal to the oscilliscope and view the transfer of an 8-bit character. | ||
| - | <color red>Describe your personal exploration activities</color> | ||