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labs:uart_tx [2019/11/09 14:34] jgoeders [Personal Exploration] |
labs:uart_tx [2020/04/30 09:46] (current) nelson old revision restored (2020/03/02 17:32) |
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| Line 63: | Line 63: | ||
| ** FSM ** | ** FSM ** | ||
| - | Create the FSM as outlined in Figure 28.12 . | + | Create the FSM as outlined in the following figure. Note, this is slightly different that the figure in the textbook, which as a small error in the BITS state. |
| + | |||
| + | {{ :labs:uart_tx:uart_tx_sm.png?600 |}} | ||
| Line 77: | Line 79: | ||
| # Reset design | # Reset design | ||
| add_force Reset 1 | add_force Reset 1 | ||
| + | add_force Send 0 | ||
| run 10ns | run 10ns | ||
| add_force Reset 0 | add_force Reset 0 | ||
| Line 151: | Line 154: | ||
| logic reset; | logic reset; | ||
| assign reset = ~CPU_RESETN; | assign reset = ~CPU_RESETN; | ||
| + | assign tx_debug = tx_out; | ||
| logic btnc_r; | logic btnc_r; | ||
| Line 195: | Line 199: | ||
| endmodule | endmodule | ||
| </file> | </file> | ||
| + | |||
| + | Look over the top-level file. You will see that it uses your debouce circuit from a previous lab, which ensures that when you hit the send button, only a single character is sent. The seven segment controller displays the current value of the switches to help quickly determine the hexadecimal value and compare it to an ASCII table. | ||
| /* | /* | ||
| Line 233: | Line 239: | ||
| */ | */ | ||
| + | |||
| Before synthesizing your design, you will need to create an .xdc file that contains the pin locations of each port in your design. Most of the pins used in this design are the same as pins used in previous designs (buttons, switches, seven-segment display, etc.). However, you will be using a new FPGA pin to connect to the UART/USB transciever and the debug port. | Before synthesizing your design, you will need to create an .xdc file that contains the pin locations of each port in your design. Most of the pins used in this design are the same as pins used in previous designs (buttons, switches, seven-segment display, etc.). However, you will be using a new FPGA pin to connect to the UART/USB transciever and the debug port. | ||
| Line 263: | Line 270: | ||
| ===== Final Pass Off ===== | ===== Final Pass Off ===== | ||
| - | To pass off this laboratory, demonstrate to the TA the following: | + | To pass off this laboratory, demonstrate to the TA your working top-level transmitter circuit (the TA will test your transmitter with several characters). |
| - | * Pass-offs for Exercises 1, 2, and 3 | + | |
| - | * Your working top-level transmitter circuit (the TA will test your transmitter with several characters) | + | |
| <color red>How many hours did you work on the lab?</color> | <color red>How many hours did you work on the lab?</color> | ||
| Line 283: | Line 288: | ||
| * Hook up the tx debug signal to the oscilliscope and view the transfer of an 8-bit character. | * Hook up the tx debug signal to the oscilliscope and view the transfer of an 8-bit character. | ||
| - | <color red>Describe your personal exploration activities</color> | ||
