This shows you the differences between two versions of the page.
Both sides previous revision Previous revision | |||
labs:uart_rx [2019/04/09 11:42] djlee |
labs:uart_rx [2019/04/09 11:47] (current) djlee |
||
---|---|---|---|
Line 108: | Line 108: | ||
* Do not use any of the digit points | * Do not use any of the digit points | ||
* Attach the anode and segment signals of the controller to the top-level outputs of the top-level module | * Attach the anode and segment signals of the controller to the top-level outputs of the top-level module | ||
+ | |||
+ | The following diagram illustrates the interconnections of different modules. | ||
+ | |||
+ | {{ :labs:UART_tx_rx.png |}} | ||
<color red>Include a copy of your top-level module in your laboratory report</color> | <color red>Include a copy of your top-level module in your laboratory report</color> | ||
Line 113: | Line 117: | ||
**Exercise 3 Pass-off:** Show a TA your top level module and explain how we will know when the rx module has received a byte.\\ \\ | **Exercise 3 Pass-off:** Show a TA your top level module and explain how we will know when the rx module has received a byte.\\ \\ | ||
- | {{ :labs:UART_tx_rx.png |}} | ||
==== Exercise #4 - Implementation ==== | ==== Exercise #4 - Implementation ==== |