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labs:sp20_codebreaker_serial [2020/06/11 10:17] nelson [Exercise #1 - Draw a message on the screen] |
labs:sp20_codebreaker_serial [2020/06/11 10:18] (current) nelson [Exercise #1 - Draw a message on the screen] |
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| Look over the code and draw a block diagram of it to make sure you understand how it works. The module contains: | Look over the code and draw a block diagram of it to make sure you understand how it works. The module contains: | ||
| * A ''clk_generator'' instance, that generates two clocks (only one of which is being used in this design). **NOTE: this is a complex circuit which is able to synthesize multiple other clocks from a single input clock. As such, it REQUIRES at least 400ns simulation time before it will output valid clock signals to the rest of your circuit. See note below.** | * A ''clk_generator'' instance, that generates two clocks (only one of which is being used in this design). **NOTE: this is a complex circuit which is able to synthesize multiple other clocks from a single input clock. As such, it REQUIRES at least 400ns simulation time before it will output valid clock signals to the rest of your circuit. See note below.** | ||
| - | * Before you proceed, go back and re-read the previous paragraph. What it is saying is that in your .tcl file, once you start the clock going you should simulate 400ns without doing anything else just so the clock generator can initialize itself. Only then should you start resetting or doing anything else with your circuit. In fact, if you watch the simulation waveforms, you will see that output of the clock generator (which is the clock to the rest of your circuitry) doesn't actually start to follow the main input clock for a while - that is due to the time it takes for the clock generator to initialize itself... | + | * Before you proceed, go back and re-read the previous paragraph. What it is saying is that in your .tcl file, once you start the clock going you should simulate 400ns without doing anything else just so the clock generator can initialize itself. Only then should you start resetting or doing anything else with your circuit. |
| * A ''CharDrawer_serial'' instance. It is used to send bytes out the "tx_out" port to be displayed by the "putty" program. It relies on your having added your own Uart Transmitter design to the project. Find down near the bottom where it instances a ''tx'' instance - that should be your design. Make sure the module name and port names match your design. | * A ''CharDrawer_serial'' instance. It is used to send bytes out the "tx_out" port to be displayed by the "putty" program. It relies on your having added your own Uart Transmitter design to the project. Find down near the bottom where it instances a ''tx'' instance - that should be your design. Make sure the module name and port names match your design. | ||
| * ''SevenSegmentControl'' and ''stopwatch'' instances, that are configured like the Stopwatch lab. | * ''SevenSegmentControl'' and ''stopwatch'' instances, that are configured like the Stopwatch lab. | ||
