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labs:seven_segment [2020/02/10 10:07] nelson |
labs:seven_segment [2020/02/12 17:31] (current) ee220ta [Exercise #1 - Seven Segment SystemVerilog] |
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| On Learning Suite, you will only fill in a few sections of this table. Make sure that your entire table is correct - it will make the rest of this lab much easier. | On Learning Suite, you will only fill in a few sections of this table. Make sure that your entire table is correct - it will make the rest of this lab much easier. | ||
| - | === Anode Signals === | + | === The Board's 7 Segments === |
| - | The seven-segment display on the NEXYS 4 board has //eight// unique digits. | + | The seven-segment display on the NEXYS 4 board has //eight// unique digits as shown below. |
| - | Each digit of the eight digit display has its own anode input. In order to turn on any of the segments of a digit, its corresponding anode signal must be asserted to provide current for individual LED segments of the digit. The schematic of this eight-digit, seven-segment display is shown below. | + | {{ :labs:7seglab_0.png?600 |}} |
| + | /*{{ :labs:seven_segment_schematic.png?350&nolink |}} */ | ||
| - | {{ :labs:seven_segment_schematic.png?350&nolink |}} | + | Each digit of the eight digit display has its own anode input (A0-A7). |
| + | NOTE, however, that there is a built-in inverter on each anode signal. Thus, to turn on any of the segments of a digit, its corresponding anode and cathode signals must both be //driven LOW//. The schematic of this eight-digit, seven-segment display is shown below. | ||
| - | This eight-digit, seven-segment display configuration is known as a **common cathode** arrangement because the cathode signals are shared among all eight digits. If more than one anode signal is asserted, the corresponding digits will have the same segments turn on because they are connected to the same cathode signals. While this significantly reduces the pin count, it makes it difficult to display different values simultaneously. (Different values can be displayed by time-multiplexing the cathode signals. You will be given a time-multiplexing seven segment display controller to use in future laboratory assignments.) | + | This eight-digit, seven-segment display configuration is known as a **common cathode** arrangement because the cathode signals are shared among all eight digits. If more than one anode signal is asserted low, the corresponding digits will have the same segments turn on because they are connected to the same cathode signals. While this significantly reduces the pin count, it makes it difficult to display different values simultaneously. (Different values can be displayed by quickly switching between the various anode and cathode signals --- the LED's will flash so quickly your eye will see them as all being "on". This is called "time-multiplexing" the digits. You will be given a time-multiplexing seven segment display controller to use in future laboratory assignments.) |
| - | + | ||
| - | The seven-segment display in this schematic uses a dedicated transistor to drive each of the anode signals. (A transistor is used because it can provide more current than the FPGA input pin.) Eight anode signals (A0-A7) are used for each of the eight digits. The left-most digit is controlled by AN7, the second to the left digit is controlled by AN6, and so on down to the right-most digit which is controlled by AN0. Because of the way the transistor is used to drive the anode input to the seven-segment display, a logic value of **0** must be passed to the anode to turn on a digit. | + | |
| For example, to turn on only the right two digits of the eight digit display, AN1 and AN0 must have a logic value of **0** and the other anode signals must have a logic value of **1**. | For example, to turn on only the right two digits of the eight digit display, AN1 and AN0 must have a logic value of **0** and the other anode signals must have a logic value of **1**. | ||
| - | In the following example, two of the digits are turned on by setting their corresponding anode to zero. All of the other digits are off since their anode signals are set to one. In addition, the digit **3** is displayed based on which cathode signals have a logic **1**. The digit point is also on since the cathode signal, DP, associated with the digit point is set to **0**. | + | In the following example, two of the digits are turned on by setting their corresponding anode to zero. All of the other digits are off since their anode signals are set to one. In addition, the digit **3** is displayed based on which cathode signals have a logic **0**. The digit point is also on since the cathode signal, DP, associated with the digit point is set to **0**. |
| ^ A7 ^ A6 ^ A5 ^ A4 ^ A3 ^ A2 ^ A1 ^ A0 ^ | ^ A7 ^ A6 ^ A5 ^ A4 ^ A3 ^ A2 ^ A1 ^ A0 ^ | ||
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| <color red>Include your TCL simulation file in your report.</color> | <color red>Include your TCL simulation file in your report.</color> | ||
| - | **Exercise 1 Pass-off:** Show a TA your your SV code, tcl commands and simulation. \\ \\ | + | **Exercise 1 Pass-off:** Show a TA your SV code, tcl commands and simulation. \\ \\ |
