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labs:pong_part_1 [2019/11/09 22:07] jgoeders [Exercise #2 - BallDrawer SystemVerilog Module] |
labs:pong_part_1 [2019/11/15 10:30] (current) jgoeders [Exercise #2 - BallDrawer SystemVerilog Module] |
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<color #ed1c24>What 3-bit binary value would you provide to the module to set the color of a pixel to cyan? Provide your answer in SystemVerilog literal form (ex 3'b000).</color> | <color #ed1c24>What 3-bit binary value would you provide to the module to set the color of a pixel to cyan? Provide your answer in SystemVerilog literal form (ex 3'b000).</color> | ||
- | <color #ed1c24>What is the minimum number of cycles required to change the entire image to blue? How many microseconds would this take, given your system clock? | + | <color #ed1c24>Assuming you can write 1 pixel per clock cycle, what is the minimum number of cycles required to change the entire image to blue? How many microseconds would this take, given your system clock? |
</color> | </color> | ||
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| y_out | Output | 8 | y-Coordinate to be drawn | | | y_out | Output | 8 | y-Coordinate to be drawn | | ||
- | The state machine should wait for the ''start'' signal before starting to draw a ball. For each pixel that needs to be drawn, the state machine should output an (x,y) coordinate using the ''x_out'' and ''y_out'' outputs, and assert the ''draw_enable'' signal. The ''done'' signal should be asserted when the ball is done being drawn. The state machine should wait for the ''start'' signal to go low before waiting for it to go back high to draw another ball. | + | The following shows a diagram of a ball with 5 pixels, and a corresponding waveform for drawing this ball at (100,50). |
- | + | ||
- | The following shows a diagram of a ball with 5 pixels, and a possible corresponding waveform for drawing this ball at (100,50). | + | |
{{:labs:lab_pong:ball_drawing_5.png| }} | {{:labs:lab_pong:ball_drawing_5.png| }} | ||
+ | {{:labs:lab_pong:ball_drawing2.png| }} | ||
- | {{:labs:lab_pong:ball_drawing2.png| }} | + | Your state machine does not need to produce the exact same timing as the waveform above, but it does not to obey a few rules: |
+ | * The state machine should wait for the ''start'' signal before starting to draw a ball. | ||
+ | * For each pixel that needs to be drawn, the state machine should output an (x,y) coordinate using the ''x_out'' and ''y_out'' outputs, and assert the ''draw'' signal to indicate that a valid pixel is being output. | ||
+ | * The ''done'' signal should be asserted for exactly 1 cycle after the ball is done being drawn (or during the last pixel). | ||
+ | * The state machine should wait for the ''start'' signal to go low before allowing another ball to be drawn. | ||
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add_force clk {0 0} {1 5ns} -repeat_every 10ns | add_force clk {0 0} {1 5ns} -repeat_every 10ns | ||
add_force reset 1 | add_force reset 1 | ||
+ | add_force start 0 | ||
run 10ns | run 10ns | ||
add_force reset 0 | add_force reset 0 | ||
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run 120ns | run 120ns | ||
</file> | </file> | ||
- | |||
- | <color #ed1c24>Include a copy of your TCL file in your lab report.</color> | ||
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| y_out | Output | 8 | y-Coordinate to be drawn | | | y_out | Output | 8 | y-Coordinate to be drawn | | ||
- | This module should work very similarly to your ''BallDrawer'' module, except now there is a ''height'' input that dictates the height of the line. You should use a counter to keep track of how many pixels you need to draw. | + | This module should work very similarly to your ''BallDrawer'' module, except now there is a ''height'' input that dictates the height of the line. Since the height can be changed, you can't use one state per pixel being drawn. Instead, your state machine will need to interact with a counter to keep track of how many pixels you need to draw. |
- | The following shows a diagram of a line 6 pixels tall, and the corresponding waveform for drawing this line at (100, 50). | + | The following shows a diagram of a line 6 pixels tall, and a waveform for drawing this line at (100, 50). |
{{:labs:lab_pong:line_drawing.png |}} | {{:labs:lab_pong:line_drawing.png |}} | ||
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{{:labs:lab_pong:line_drawing_waveform.png|}} | {{:labs:lab_pong:line_drawing_waveform.png|}} | ||
- | Simulate your ''VLineDrawer'' module to ensure it is working correctly. Then modify the top-level from the last exercise to draw a vertical line instead of a ball. | + | Simulate your ''VLineDrawer'' module to ensure it is working correctly. You can probably re-use the TCL above with minimal changes. Make sure to set the ''height'' input, and test drawing two lines of different height. |
+ | |||
+ | <color #ed1c24>Paste your TCL simulation file in your lab report.</color> | ||
+ | |||
+ | Modify the top-level from the last exercise to draw a vertical line instead of a ball. | ||
\\ | \\ | ||
- | ** Exercise #4 Pass-off:** Show the TA the simulation of your ''VLineDrawer'' module and the line drawing correctly on the monitor. | + | ** Exercise #4 Pass-off:** Show the TA your ''VLineDrawer'' module and the line drawing correctly on the monitor. |
+ | |||
+ | ---- | ||
+ | |||
+ | ==== Final Pass-Off === | ||
- | <color red>Submit your final lab report on Learning Suite.</color> | + | <color red>Submit your final lab report on Learning Suite. Submit the SystemVerilog code of your two modules.</color> |
+ | There is no personal exploration for this lab. |